Packet processing on a multi-core processor
US7990974B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 29, 2008 |
| Grant date | Aug 2, 2011 |
| Priority date | — |
| Expiry date | Sep 24, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L45/60
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for packet processing on a multi-core processor. According to one embodiment of the invention, a first set of one or more processing cores are configured to include the capability to process packets belonging to a first set of one or more packet types, and a second set of one or more processing cores are configured to include the capability to process packets belonging to a second set of one or more packet types, where the second set of packet types is a subset of the first set of packet types. Packets belonging to the first set of packet types are processed at a processing core of either the first or second set of processing cores. Packets belonging to the second set of packet types are processed at a processing core of the first set of processing cores.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.