Memory block compaction method, circuit, and system in storage devices based on flash memories
US7991942B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | May 9, 2007 |
| Grant date | Aug 2, 2011 |
| Priority date | — |
| Expiry date | Oct 2, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/88
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A solution for managing a storage device based on a flash memory is proposed. A corresponding method starts with the step for mapping a logical memory space of the storage device (including a plurality of logical blocks) on a physical memory space of the flash memory (including a plurality of physical blocks, which are adapted to be erased individually). The physical blocks include a set of first physical blocks (corresponding to the logical blocks) and a set of second—or spare—physical blocks (for replacing each bad physical block that is unusable). The method continues by detecting each bad physical block. Each bad physical block is then discarded, so to prevent using the bad physical block for mapping the logical memory space.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.