Patent · US Active

Real-time background legality verification of pin placement

US7992119B1 · kind B1 · utility

11Cited by
3References
27Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJun 6, 2008
Grant dateAug 2, 2011
Priority date
Expiry dateSep 26, 2029

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F30/34
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Pin placement legality is verified in real-time in a background to reduce a number of input/output assignment analysis runs during a physical design of a programmable logic device. Edited pin properties are checked quickly in the background against certain rules, and results displayed to a user usually before a new pin is edited. Available and legal positions are found and displayed for a selected pin to reduce errors.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.