Security of program executables and microprocessors based on compiler-architecture interaction
US7996671B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 12, 2004 |
| Grant date | Aug 9, 2011 |
| Priority date | — |
| Expiry date | Jun 27, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/30181
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method, for use in a processor context, wherein instructions in a program executable are encoded with plural instruction set encodings. A method wherein a control instruction encoded with an instruction set encoding contains information about decoding of an instruction that is encoded with another instruction set encoding scheme. A method wherein instruction set encodings are randomly generated at compile time. A processor framework wherein an instruction is decoded during execution with the help of information provided by a previously decoded control instruction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.