Method and apparatus for decoding a LDPC code
US7996752B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 5, 2007 |
| Grant date | Aug 9, 2011 |
| Priority date | — |
| Expiry date | Jun 8, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/6516
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In a decoder for decoding a low density parity check (LDPC) code suitable for decoding multi-rated LDPC codes, a method is provided. The method comprises the steps of: providing a memory for the decoding with the memory dependent on a parity check matrix H with maximum number of “1”s; using a number of column updating units, updating columns parallely and simultaneously producing messages; and using a number of row updating units, updating rows parallely and simultaneously producing messages. Whereby an improved architecture in a logic and the memory is provided such that an improved throughput, power consumption, and memory area is achieved.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.