Semiconductor devices having contact plugs with stress buffer spacers and methods of fabricating the same
US7998851B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 2, 2010 |
| Grant date | Aug 16, 2011 |
| Priority date | — |
| Expiry date | Mar 2, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D88/00
Abstract
A semiconductor device includes an inorganic insulating layer on a semiconductor substrate, a contact plug that extends through the inorganic insulating layer to contact the semiconductor substrate and a stress buffer spacer disposed between the node contact plug and the inorganic insulating layer. The device further includes a thin-film transistor (TFT) disposed on the inorganic insulating layer and having a source/drain region extending along the inorganic insulating layer to contact the contact plug. The device may further include an etch stop layer interposed between the inorganic insulating layer and the semiconductor substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.