Method for fabricating semiconductor device
US7998862B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 19, 2010 |
| Grant date | Aug 16, 2011 |
| Priority date | — |
| Expiry date | Feb 18, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/2885
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of fabricating a semiconductor device includes forming a via hole in a semiconductor substrate, forming an isolation layer on an inner side of the via hole, forming a diffusion barrier layer over an upper portion of the semiconductor substrate and the inner side of the via hole where the isolation layer is formed, arranging a solvent, which contains electrically charged metal particles, on the semiconductor substrate where the diffusion barrier layer is formed, and filling the via hole with the metal particles by moving the metal particles using applied external force. The applied external force said includes a voltage causing an electric current to flow between the semiconductor substrate and the solvent, an electrical field applied between the semiconductor substrate and the solvent, or a magnetic field applied between the semiconductor substrate and the solvent.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.