Patent · US Active

Method for circuit design

US8001501B2 · kind B2 · utility

0Cited by
10References
16Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMay 19, 2008
Grant dateAug 16, 2011
Priority date
Expiry dateOct 15, 2029

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F30/333
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A method for designing a circuit. The method includes (i) providing a netlist of a design and (ii) dividing the netlist into N user logics, N being a positive integer. After said dividing the netlist is performed, the N user logics in N macro test wrappers are instantiated resulting in N instantiated logics. After said instantiating the N user logics is performed, the N instantiated logics are processed. After said processing is performed, a result of said processing is back-annotated to the netlist.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.