Semiconductor device and method of manufacturing the same
US8003525B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 26, 2008 |
| Grant date | Aug 23, 2011 |
| Priority date | — |
| Expiry date | Jul 8, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/8503
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A GaN layer and an n-type AlGaN layer are formed over an insulating substrate, and thereafter, a gate electrode, a source electrode and a drain electrode are formed on them. Next, an opening reaching at least a surface of the insulating substrate is formed in the source electrode, the GaN layer and the n-type AlGaN layer. Then, a nickel (Ni) layer is formed in the opening. Thereafter, by conducting dry etching from the back side while making the nickel (Ni) layer serve as an etching stopper, a via hole reaching the nickel (Ni) layer is formed in the insulating substrate. Then, a via wiring is formed extending from an inside the via hole to the back surface of the insulating substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.