Method and system for reducing signal interference
US8005430B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 2, 2009 |
| Grant date | Aug 23, 2011 |
| Priority date | — |
| Expiry date | Jul 21, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B1/7103
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
Signals propagating on an aggressor communication channel can cause interference in a victim communication channel. A sensor coupled to the aggressor channel can obtain a sample of the aggressor signal. The sensor can be integrated with or embedded in a system, such as a flex circuit or a circuit board, that comprises the aggressor channel. The sensor can comprise a dedicated conductor or circuit trace that is near an aggressor conductor, a victim conductor, or an EM field associated with the interference. An interference compensation circuit can receive the sample from the sensor. The interference compensation circuit can have at least two operational modes of operation. In the first mode, the circuit can actively generate or output a compensation signal that cancels, corrects, or suppresses the interference. The second mode can be a standby, idle, power-saving, passive, or sleep mode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.