Semiconductor integrated circuit and method for testing semiconductor integrated circuit
US8006154B2 · kind B2 · utility
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6References
10Claims
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Key dates
| Filing date | Oct 14, 2009 |
| Grant date | Aug 23, 2011 |
| Priority date | — |
| Expiry date | Feb 2, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/84
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A semiconductor integrated circuit includes a clock generator for generating a second clock signal having a frequency that varies over time by using a first clock signal having a fixed frequency, a test circuit for generating a digital signal according to a difference between a first frequency corresponding to the first clock signal and a second frequency corresponding to the second clock signal by a digital logic operation based on the first clock signal and the second clock signal, and a signal path for outputting the digital signal generated by the test circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.