Patent · US Active

Read circuit and read method

US8009484B2 · kind B2 · utility

3Cited by
5References
8Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 26, 2009
Grant dateAug 30, 2011
Priority date
Expiry dateFeb 25, 2030

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG11C2013/0057
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

In a read circuit, a write circuit writes a data to be stored and/or a test data to the memory cell. A control circuit controls the write circuit to write the test data to the memory cell in a first phase, and to write the test data which is same as the first phase to the memory cell in a second phase. An integrator integrates voltages at one terminal of the memory cell during the first phase to obtain a first integrated voltage, and integrates voltages at one terminal of the memory cell during the second phase to obtain a second integrated voltage. A buffer stores the first integrated voltage. A comparator compares the first integrated voltage from the buffer with the second integrated voltage from the integrator to obtain the data.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.