Method and apparatus for evaluating integrated circuit design performance using basic block vectors, cycles per instruction (CPI) information and microarchitecture dependent information

US8010334B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Robert H. Bell, Jr. · New Providence, US
• Thomas W. Chen · Fort Collins, US
• Venkat R. Indukuru · Austin, US
• Alex E. Mericas · Austin, US
• Pattabi M. Seshadri · Austin, US
• Madhavi G. Valluri · Austin, US

Key dates

• Filing date: Apr 30, 2008
• Grant date: Aug 30, 2011
• Expiry date: Jan 19, 2030

Classification

• Technology area (CPC G): Physics
• CPC primary: G01R31/318364
• WIPO field: Measurement
• WIPO sector: Instruments

Abstract

A test system or simulator includes an integrated circuit (IC) benchmark software program that executes workload program software on a semiconductor die IC design model. The benchmark software program includes trace, simulation point, basic block vector (BBV) generation, cycles per instruction (CPI) error, clustering and other programs. The test system also includes CPI stack program software that generates CPI stack data that includes microarchitecture dependent information for each instruction interval of workload program software. The CPI stack data may also include an overall analysis of CPI data for the entire workload program. IC designers may utilize the benchmark software and CPI stack program to develop a reduced representative workload program that includes CPI data as well as microarchitecture dependent information.