Analog comparators in a control system
US8010722B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 20, 2009 |
| Grant date | Aug 30, 2011 |
| Priority date | — |
| Expiry date | Mar 6, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L12/40006
- WIPO fieldEngines, pumps, turbines
- WIPO sectorMechanical engineering
Abstract
An apparatus is disclosed that includes first and second circuits coupled together via a bus, an input pin configured to receive an analog input signal, a digital-to-analog (DAC) convertor configured to convert a multibit reference signal into an analog reference signal, a comparator circuit coupled to the bus, an output of the DAC and to the input pin. The comparator circuit is configured to receive the analog reference signal from the DAC and the analog input signal, and configured to generate a first digital signal set to a first state if the analog reference signal is greater in magnitude than the analog input signal, or set to a second state if analog reference signal is lower in magnitude than the analog input signal. The comparator circuit is also configured to transmit the first digital signal to the first circuit via the bus. The first circuit in turn is configured to receive the first digital signal. In response to receiving the first digital signal, the first circuit is configured to generate a second digital signal set to the first or second state depending on whether the received first digital signal is set to the first or second state. The second circuit is configured…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.