Patent · US Active

System and method for controlling access to a memory device of an electronic device

US8010762B2 · kind B2 · utility

0Cited by
4References
17Claims
0Family size

Assignee

Inventor

Key dates

Filing dateApr 13, 2010
Grant dateAug 30, 2011
Priority date
Expiry dateApr 13, 2030

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F12/1425
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

The invention relates to a system and method for controlling implementation of a command to a NAND memory device. The method comprises: monitoring an input/output (I/O) bus connected to the NAND memory device for an assertion of a write command for the NAND memory device. Upon detection of the write command, the method evaluates a destination address associated with the write command. If the destination address is not a restricted address for the NAND memory device, then the method allows the write command to modify the contents; and if the destination address is a restricted address for the NAND memory device, then the method prevents assertion of the write command on the contents.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.