Method of fabricating stacked semiconductor chips
US8012798B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | May 5, 2010 |
| Grant date | Sep 6, 2011 |
| Priority date | — |
| Expiry date | May 5, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15788
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for manufacturing a semiconductor device includes forming a first opening in a substrate to expose an interconnect structure, forming a seed film on the substrate, forming a first projecting electrode buried inside the first opening protruding outward from the substrate, forming a first metal film on the first projecting electrode, attaching a first supporting substrate to the substrate with a first adhesion layer, forming a second opening in the substrate to expose the interconnect structure, forming a second projecting electrode buried inside the second opening and protruding outward from the substrate, forming a second metal film on the second projecting electrode, attaching a second supporting substrate to the substrate with a second adhesion layer, removing the first supporting substrate, the first adhesion layer, and an exposed part of the seed film, removing the second supporting substrate and the second adhesion layer, and cutting the substrate into the plurality of chips.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.