Method for fabricating a dual workfunction semiconductor device and the device made thereof
US8012827B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 22, 2009 |
| Grant date | Sep 6, 2011 |
| Priority date | — |
| Expiry date | Nov 18, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for manufacturing a dual workfunction semiconductor device and the device made thereof are disclosed. In one aspect, the method includes manufacturing a first transistor in a first region and a second transistor in a second region of a substrate, the first transistor including a first gate stack, the first gate stack having a first gate dielectric capping layer and a first metal gate electrode layer. The second gate stack is similar to the first gate stack. The method includes applying a first thermal budget to the first gate dielectric capping layer and a second thermal budget to the second gate dielectric capping material to tune the workfunction of the first and second gate stack, the first thermal budget being smaller than the second thermal budget such that after the thermal treatment the first and the second gate stack have different work functions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.