Semiconductor device
US8014204B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 28, 2010 |
| Grant date | Sep 6, 2011 |
| Priority date | — |
| Expiry date | Sep 28, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/681
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a first memory cell which includes a first memory transistor and a first selector transistor. The semiconductor device further includes a second memory cell which includes a second memory transistor and a second selector transistor. The semiconductor device further includes a first word line electrically coupled to a gate electrode of the first memory transistor and to a gate electrode of the second selector transistor, and a second word line electrically coupled to a gate electrode of the second memory transistor and to a gate electrode of the first selector transistor. The semiconductor device further includes a first source line electrically coupled to a source region of the first memory transistor and to a source region of the second memory transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.