Method of compensating for propagation delay of tri-state bidirectional bus in a semiconductor device
US8015336B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 3, 2007 |
| Grant date | Sep 6, 2011 |
| Priority date | — |
| Expiry date | Aug 10, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/04
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A semiconductor device for detecting and compensating for a propagation delay of a tri-state bidirectional bus connected between a master block and a plurality of slave blocks. The master block controls the slave blocks. A bidirectional bus connects the master block and each of the slave blocks and accommodates transmission of data therebetween. A unidirectional bus is connected between the master block and each of the slave blocks. The unidirectional bus accommodates the transmission of control signals generated in the master block to the slave blocks wherein the master block detects a propagation delay time between the master block and the slave blocks. The master block counts the number of clocks from a time when a selected slave block transmits an allocated symbol to a time when the allocated symbol reaches the master block such that a propagation delay time between the master block and the selected slave block is detected and stored.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.