Card design with fully buffered memory modules and the use of a chip between two consecutive modules
US8018736B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jan 11, 2007 |
| Grant date | Sep 13, 2011 |
| Priority date | — |
| Expiry date | Feb 20, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4059
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The invention concerns the use of an AMB component (25) in a memory installation with fully buffered Dimm memory modules connected in series, characterised in that the AMB component (25) is placed on a connecting line (30) from the memory modules (2) to a memory controller (1) of the installation in order to re-amplify the connecting line (30) between two consecutive FBD memory modules (21, 22).The invention also concerns a connection interface that includes such an AMB amplifier component (25) for the connection of a maincard (3) that includes at least one processor, to an auxiliary memory card of the type with a series of memory modules (2), where the maincard has at least one pair of channels connected to the processor. Two series of FBD memory modules (2) are connected to respective FBD channels in the auxiliary memory card using FBD connectors (200) in a daisy-chain arrangement.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.