Static memory device and static random access memory device
US8018788B2 · kind B2 · utility
19Cited by
3References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 25, 2009 |
| Grant date | Sep 13, 2011 |
| Priority date | — |
| Expiry date | Jul 3, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/413
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A static memory device includes a bit cell connected to an internal voltage line, and a power supply control circuit connected between the internal voltage line and a power supply voltage, wherein the power supply control circuit is configured to supply the power supply voltage level to the internal voltage line, and the power supply control circuit is configured to perform a write assist function that includes floating the internal voltage line during a write operation on the bit cell, the internal voltage line being floated in response to a signal of a mode control signal group.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.