Modular approach to the TCP/IPv6 hardware implementation
US8018928B2 · kind B2 · utility
1Cited by
7References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 19, 2004 |
| Grant date | Sep 13, 2011 |
| Priority date | — |
| Expiry date | Feb 3, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L69/167
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A method for processing a packet comprising an ordered sequence of packet parts is disclosed. The method uses a set of hardware processing modules, and the method comprises the steps of broadcasting, in a step the next header field of a received packet part to the set of processing modules, and processing, in a step the received packet part by a sub-set of the modules dependent upon the broadcast next header field.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.