Method to improve operating performance of a computing device
US8019920B2 · kind B2 · utility
1Cited by
31References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 1, 2008 |
| Grant date | Sep 13, 2011 |
| Priority date | — |
| Expiry date | Apr 23, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0831
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The system includes a microprocessor, a first buffer, a second buffer, and a control circuit. The control circuit includes a memory and an interface. The control circuit is configured to determine a first buffer value and compare the first buffer value to a predetermined value to obtain a result. The control circuit is further configured to control a read issue rate of the first buffer based on the result. The memory is configured to store at least one of the first buffer value, the result, the read issue rate, and the TAG.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.