Selectable-tap equalizer
US8023584B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 12, 2008 |
| Grant date | Sep 20, 2011 |
| Priority date | — |
| Expiry date | Nov 12, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/03885
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A signaling circuit having a selectable-tap equalizer. The signaling circuit includes a buffer, a select circuit and an equalizing circuit. The buffer is used to store a plurality of data values that correspond to data signals transmitted on a signaling path during a first time interval. The select circuit is coupled to the buffer to select a subset of data values from the plurality of data values according to a select value. The equalizing circuit is coupled to receive the subset of data values from the select circuit and is adapted to adjust, according to the subset of data values, a signal level that corresponds to a data signal transmitted on the signaling path during a second time interval.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.