Multimode block cipher architectures
US8023644B2 · kind B2 · utility
4Cited by
1References
1Claims
0Family size
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Key dates
| Filing date | Oct 30, 2007 |
| Grant date | Sep 20, 2011 |
| Priority date | — |
| Expiry date | Jul 8, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2209/125
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
An architecture for a block cipher, where the architecture includes functional units that are logically reconfigurable so as to be able to both encrypt clear text into cipher text and decrypt cipher text into clear text using more than one block cipher mode based on at least one of advanced encryption standard and data encryption standard.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.