Complex phase locked loop
US8024120B2 · kind B2 · utility
Inventor
Key dates
| Filing date | Nov 11, 2008 |
| Grant date | Sep 20, 2011 |
| Priority date | — |
| Expiry date | Dec 11, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03D3/00
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A method of estimating an instantaneous frequency of a component of interest in a complex primary signal via a complex Phase Locked Loop (PLL). A complex incident signal including a complex exponential evaluated at a synthesis frequency is calculated according to a complex Voltage Controlled Oscillator (VCO) function. A complex mixed signal is calculated according to a function that includes multiplying the complex primary signal by a representation of the complex incident signal. A complex baseband signal is calculated according to a function that includes filtering the complex mixed signal such that the bandwidth of the complex baseband signal is less than or equal to the bandwidth of the complex mixed signal. A residual frequency of the complex baseband signal is calculated via a complex Phase Discriminator (PD). The synthesis frequency is modified according to a function that includes the synthesis frequency and the residual frequency, such that the residual frequency is minimized. The instantaneous frequency is calculated according to a function that includes a representation of the synthesis frequency and stored.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.