Packet memory processing system having memory buffers with different architectures and method therefor
US8024541B2 · kind B2 · utility
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8References
11Claims
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Key dates
| Filing date | Mar 25, 2005 |
| Grant date | Sep 20, 2011 |
| Priority date | — |
| Expiry date | Sep 1, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L49/901
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
An architecture for use in packet processing and supporting compatibility with current BSD implementations for packet processing is proposed wherein two MBUF formats are supported. A first format includes a header portion and a data portion for storing data therein. A second format includes a header portion but is absent a data portion and is for addressing data stored within a cluster and external to the MBUF itself.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.