Display controller, graphics processor, rendering processing apparatus, and rendering control method
US8026919B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Nov 30, 2006 |
| Grant date | Sep 27, 2011 |
| Priority date | — |
| Expiry date | May 9, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N7/0132
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A rendering processing unit of a graphics processor selects a buffer in a frame buffer in which to write rendering data by switching between multiple buffers in the frame buffer and writes rendering data accordingly; a display controller selects a buffer in the frame buffer from which to read rendering data by switching between a plurality of buffers in the frame buffer according to a sequence, and supplies the rendering data read by scanning the frame buffer to a display; a switching signal generating unit generates a buffer switching signal for directing the display controller to switch the buffer in the frame buffer from which to read at a frequency different from a vertical synchronization frequency of the display assumed by the graphics processor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.