Spiral servo detection with phase-locked loop (PLL)
US8027114B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 18, 2009 |
| Grant date | Sep 27, 2011 |
| Priority date | — |
| Expiry date | Nov 4, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11B2220/2516
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The present disclosure includes apparatus, systems and techniques relating to detecting sync marks. In some implementations, an apparatus includes phase locking circuitry that includes a phase calculator to identify a phase of sampled data, and a phase-locked loop to generate an output signal and phase-lock the generated output signal with the calculated phase of the sampled data to produce a phase-locked signal. The apparatus includes detector circuitry to receive phase information of the phase-locked output signal. The detector circuitry includes a detector to generate a stream of decision bits for the sampled data with each bit in the stream being associated with a different phase. The detector circuitry includes an output selector to select at least one bit from the stream based on the received phase information of the phase-locked output signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.