Memory system and method of accessing a semiconductor memory device
US8027194B2 · kind B2 · utility
47Cited by
12References
20Claims
0Family size
Assignee
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Key dates
| Filing date | Jun 12, 2009 |
| Grant date | Sep 27, 2011 |
| Priority date | — |
| Expiry date | Oct 7, 2029 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
One embodiment of a nonvolatile memory device includes a memory cell array including a plurality of multi-level cells, and a control unit configured to determine a characteristic of data to be stored in the memory cell array. The control unit is configured to select one of plural multi-bit programming methods based on the determination. Data is stored in the memory cell array according to the selected multi-bit programming method, and at least one of the plural multi-bit programming methods maintains least significant bit data when there is a program fail of most significant bit data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.