Reducing data stream jitter during deinterleaving
US8027394B2 · kind B2 · utility
7Cited by
7References
23Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Sep 25, 2007 |
| Grant date | Sep 27, 2011 |
| Priority date | — |
| Expiry date | Jun 8, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04H40/18
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In one embodiment, the present invention includes a deinterleaver having an input interface to receive orthogonal frequency division multiplexing (OFDM) symbols from a demodulator, a memory coupled to the input interface to store the OFDM symbols, an output interface coupled to the memory to receive the OFDM symbols stored in the memory, and a digital phase lock loop (PLL) to control and adjust a reading rate of data from the memory responsive to dynamic and static channel conditions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.