Semiconductor device and semiconductor device layout designing method
US8028264B2 · kind B2 · utility
9Cited by
6References
5Claims
0Family size
Assignee
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Key dates
| Filing date | Apr 27, 2007 |
| Grant date | Sep 27, 2011 |
| Priority date | — |
| Expiry date | Dec 12, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/90
Abstract
A semiconductor device including a plurality of cells having an antenna protection element and a cell other than the antenna protection element; and a first dummy pattern and a second dummy pattern arranged in a layer above the plurality of cells. Further, the first dummy pattern overlaps with the antenna protection element, the second dummy pattern overlaps with the cell other than the antenna protection element, and a first layout rule of the first dummy pattern is different from a second layout rule of the second dummy pattern.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.