System and method for automated placement in custom VLSI circuit design with schematic-driven placement
US8028266B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 31, 2008 |
| Grant date | Sep 27, 2011 |
| Priority date | — |
| Expiry date | Dec 11, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/392
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for automatically generating an electronic circuit layout with placed circuit elements includes receiving a user provided schematic, the user provided schematic comprising a plurality of circuit elements, each circuit element comprising general parameters. The method associates a plurality of first placement parameters with each of the plurality of circuit elements. The method retrieves, from a design library, design parameters associated with at least one of the plurality of circuit elements. The method selects a subset of circuit elements and receives placement inputs. The method generates a first placed layout configuration comprising adjusted placement parameters, based on the received placement inputs, the first placement parameters, and the design parameters. The method assigns absolute placement coordinates for each of the plurality of circuit elements based on the first placed layout configuration. The method generates an electronic circuit layout with placed circuit elements based on the absolute placement coordinates.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.