Forming electroplated inductor structures for integrated circuits
US8029922B2 · kind B2 · utility
1Cited by
1References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 31, 2007 |
| Grant date | Oct 4, 2011 |
| Priority date | — |
| Expiry date | Aug 5, 2030 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T428/325
- WIPO fieldSurface technology, coating
- WIPO sectorChemistry
Abstract
Methods and associated structures of forming microelectronic devices are described. Those methods may include forming a magnetic material on a substrate, wherein the magnetic material comprises rhenium, cobalt, iron and phosphorus, and annealing the magnetic material at a temperature below about 330 degrees Celsius, wherein the coercivity of the annealed magnetic material is below about 1 Oersted.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.