Patent · US Active

Semiconductor integrated circuit

US8030961B2 · kind B2 · utility

3Cited by

22References

7Claims

0Family size

Assignee

Kabushiki Kaisha Toshiba · JP

Inventor

Katsuki Matsudera · Yokohama, JP

Key dates

Filing date	Sep 3, 2010
Grant date	Oct 4, 2011
Priority date	—
Expiry date	Sep 3, 2030

Classification

Technology area (CPC H)Electricity
CPC primaryH03F2203/45691
WIPO fieldBasic communication processes
WIPO sectorElectrical engineering

Abstract

A semiconductor integrated circuit includes a control signal generating circuit which is configured to set, at least at a time of a first state, first and fifth control signals at a first voltage level, and second, third and fourth control signals at a second voltage level, and to set, at a time of a second state, the first to fourth control signals at the first voltage level, and the fifth control signal at an arbitrary voltage level.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.