Patent · US Active

Techniques for level shifting signals

US8030964B1 · kind B1 · utility

10Cited by

8References

21Claims

0Family size

Assignee

Altera Corporation · US

Inventors

Shou-Po Shih · Cupertino, US
Weiqi Ding · Fremont, US
Juei-Chu Tu · Milpitas, US

Key dates

Filing date	May 15, 2008
Grant date	Oct 4, 2011
Priority date	—
Expiry date	Jun 6, 2028

Classification

Technology area (CPC H)Electricity
CPC primaryH03K19/018521
WIPO fieldBasic communication processes
WIPO sectorElectrical engineering

Abstract

A level shifter circuit includes an input circuit, an inverter, a pull-up circuit, and a pull-down circuit. The input circuit generates a pull-up signal in response to an input signal using charge from a supply voltage. The inverter inverts the input signal to generate a pull-down signal. The inverter comprises complementary transistors that receive charge from the supply voltage. The pull-up circuit pulls a level shifted output signal of the level shifter circuit to the supply voltage in response to the pull-up signal. The pull-down circuit pulls the level shifted output signal to a low voltage in response to the pull-down signal.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.