Ruggedized chip scale atomic clock
US8031010B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 24, 2009 |
| Grant date | Oct 4, 2011 |
| Priority date | — |
| Expiry date | Dec 13, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L1/022
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The present invention is a Chip Scale Atomic Clock (CSAC)-enabled Time and Frequency Standard (CTFS) architecture. The CTFS architecture includes a microcontroller, a Time Compensated Crystal Oscillator (TCCO) circuit which is connected to the microcontroller, and a Chip Scale Atomic Clock (CSAC) which is connected to the microcontroller. The microcontroller is configured for selectively causing the CTFS to provide a TCCO circuit-based output frequency when the CTFS has not locked to a predetermined atomic resonance, and is further configured for causing the CTFS to provide a CSAC-based output frequency when the CTFS has locked to a predetermined atomic resonance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.