Circuit configuration
US8031035B2 · kind B2 · utility
3Cited by
8References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 7, 2010 |
| Grant date | Oct 4, 2011 |
| Priority date | — |
| Expiry date | Oct 7, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01P1/20345
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A ceramic multilayer construction includes three resonators designed as parallel strip lines that are capacitatively or magnetically coupled to each other. All circuit components are implemented in the form of metallizations in multilayer construction. Capacitative couplings are implemented by coupling capacitors. The strip line resonators are shortened by shunt arms to ground having grounding capacitors arranged therein.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.