Method and system for memory attack protection to achieve a secure interface
US8032761B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 10, 2006 |
| Grant date | Oct 4, 2011 |
| Priority date | — |
| Expiry date | Aug 3, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2221/2107
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Aspects of a method and system for memory attack protection to achieve a secure interface are provided. An integrated memory within a slave device may be configured into a plurality of memory portions or regions by commands from a host device. The memory regions may be utilized during operations associated with authentication of subsequent commands from the host device. A first memory region may enable storage of encrypted host commands and data. A second region may enable storage of decrypted host commands and data. A third region may enable storage of internal variables and/or intermediate results from operations performed by the slave device. Another region may comprise internal registers that enable storage of information only accessible to the slave device. Access to some of the memory regions may be controlled by a bus controller and/or a memory interface integrated within the slave device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.