Structure for an absolute duty cycle measurement circuit
US8032850B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 30, 2008 |
| Grant date | Oct 4, 2011 |
| Priority date | — |
| Expiry date | Jan 24, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2119/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A design structure for a circuit for measuring the absolute duty cycle of a signal, is provided. A non-inverted path from a signal source is selected and various DCC circuit setting indices are cycled through until a divider, coupled to the output of the DCC circuit, fails. A first minimum pulse width at which the divider fails is then determined based on the index value of the DCC circuit at the time of the failure. An inverted path from the signal source is selected and the various DCC circuit setting indices are cycled through again until the divider fails. A second minimum pulse width at which the divider fails is then determined based on the index value of the DCC circuit at the time of this second failure. The duty cycle is then calculated based on a difference of the first and second minimum pulse width values.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.