Semiconductor device including interconnects, vias connecting the interconnects and greater thickness of the liner film adjacent the vias
US8035232B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 8, 2009 |
| Grant date | Oct 11, 2011 |
| Priority date | — |
| Expiry date | Oct 27, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An interlayer insulating film is formed on the upper surface of a semiconductor substrate, and lower-level interconnects are formed in the interlayer insulating film. A liner insulating film is formed on the upper surfaces of the interlayer insulating film and lower-level interconnects. An interlayer insulating film is formed on the upper surface of the liner insulating film. Upper-level interconnects are formed in the interlayer insulating film. The lower-level interconnects and the upper-level interconnects are connected with each other through vias. Parts of the liner insulating film formed in via-adjacent regions have a greater thickness than a part thereof formed outside the via-adjacent regions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.