Image sensor
US8035715B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 25, 2009 |
| Grant date | Oct 11, 2011 |
| Priority date | — |
| Expiry date | May 17, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N25/779
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Provided is an image sensor that may reduce the number of external terminals for downsizing of a chip, generate a write signal (RE) of a Y address with one pulse, and employ an external circuit having the same configuration as that of the conventional example. The image sensor uses an X-Y address scanning system in a pixel element matrix, and includes: a register latch that sets a Y address for selection of a row according to a write signal; a Y address register that decodes a Y address data from the register latch to output a Y address signal for selection of the row in the pixel element matrix; and an X address control unit that generates an X address signal for selection of a column. The register latch brings the Y address register into a disenable state so as to cause the Y address register not to output the Y address signal at timing at which the write signal is input to the Y address register, and brings the Y address register into an enable state so as to cause the Y address register to output the Y address signal at timing at which the input of the write signal is completed and the Y address data is written into the Y address register.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.