Non-volatile memory devices including stacked NAND-type resistive memory cell strings
US8036018B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 1, 2010 |
| Grant date | Oct 11, 2011 |
| Priority date | — |
| Expiry date | Nov 1, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/8836
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A non-volatile memory device includes a substrate, an insulating layer on the substrate, and a plurality of serially connected resistive memory cells stacked in the insulating layer such that a first one of the plurality of resistive memory cells is on the substrate and a next one of the plurality of resistive memory cells is on the first one of the plurality of resistive memory cells to define a NAND-type resistive memory cell string. A bit line on the insulating layer is electrically connected to a last one of the plurality of resistive memory cells. At least one of the plurality of resistive memory cells may include a switching device and a data storage element including a variable resistor connected in parallel with the switching device. Related devices and fabrication methods are also discussed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.