DC offset cancellation circuit for a receiver
US8036622B2 · kind B2 · utility
3Cited by
18References
32Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 28, 2006 |
| Grant date | Oct 11, 2011 |
| Priority date | — |
| Expiry date | Sep 25, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03D3/008
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Techniques for cancelling DC offset are described. A DC offset cancellation circuit in a receiver cancels DC offsets caused by leaked LO (local oscillator) signals from a LO signal generator. The receiver first calibrates itself by using the DC offset cancellation circuit during a transmit mode. During the calibration, the DC offset cancellation circuit stores the DC offset voltage signal caused by the leaked LO signals. During a receiving mode when the receiver is receiving a signal, the receiver subtracts the stored DC offset voltage signal from the received signal to cancel the DC offsets caused by leaked LO signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.