Stacked semiconductor device and method of manufacturing the same
US8039970B2 · kind B2 · utility
106Cited by
8References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 29, 2008 |
| Grant date | Oct 18, 2011 |
| Priority date | — |
| Expiry date | Jan 29, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/20752
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A stacked semiconductor device includes a first semiconductor element mounted on a circuit substrate and a second semiconductor element stacked on the first semiconductor element via a spacer layer. An electrode pad of the first semiconductor element is electrically connected to a connection portion of the circuit substrate through a first metal wire. A vicinity of the end portion of the first metal wire connected to the electrode pad is in contact with an insulating protection film which covers the surface of the first semiconductor element.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.