Optimized rowoff voltage
US8040339B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 25, 2007 |
| Grant date | Oct 18, 2011 |
| Priority date | — |
| Expiry date | May 31, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2330/028
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Circuitry for controlling a display matrix formed of light-emitting diodes arranged in rows and columns, diodes in each row being connected to common row lines, and diodes in each column being connected to common column lines, each of the column lines being selectively connected to a current source for providing a current to each of the column lines when the column line is selected, a column voltage being present at a column node of each column line while the column line is selected, each of the row lines being selectively connected to a rowoff voltage for turning off the diodes in that row, the circuitry including circuitry for generating the rowoff voltage including: capture circuitry arranged to capture a maximum value of the column voltages present at the column nodes of a plurality of selected column lines; storage circuitry arranged to store the maximum column voltage; and output circuitry arranged to provide the rowoff voltage based on the maximum column voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.