Method, system and device for processing failure
US8040793B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 9, 2008 |
| Grant date | Oct 18, 2011 |
| Priority date | — |
| Expiry date | Jul 12, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04Q2011/0088
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A method, a system, and a device for processing failure is provided; the method is applicable to a label switched path (LSP) including a first node, a second node, and at least one third node. The first node and the second node are adjacent nodes suffering communication breakdown. The first node restarts. The third node is a normal node closest to the restarted first node. When the communication between the first node and the second node is broken, the third node maintains control state information of the LSP in certain time. When the communication between the first node and the second node is recovered in the certain time, the first node, the second node, and the third node recover the control state information of the LSP. A failure processing system and a device on LSP are further provided. Therefore, when several nodes on the LSP suffer communication failures, the LSP can be reliably recovered.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.