Information processing device, transfer circuit and error controlling method for information processing device
US8042008B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Nov 23, 2010 |
| Grant date | Oct 18, 2011 |
| Priority date | — |
| Expiry date | Nov 23, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L41/0816
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
An information processing device includes SBs; an XBB for executing data transfer between the SBs; and an SCF for managing and controlling the SBs and the XBB. The SB includes a transmitting/receiving unit for transmitting a notification packet indicating occurrence of an error via the XBB when detecting the occurrence of the error. The SCF includes an executing unit for executing a configuration change process corresponding to an instruction when detecting the instruction related to the SB, a suspending unit for suspending acceptance of an error report from the SB in which the error occurs during execution of the configuration change process and an XBB controller for controlling the XBB to destroy the notification packet received from the SB of which configuration change process is being executed and controlling the XBB to inhibit transfer of the notification packet to the SB of which configuration change process is being executed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.