Semiconductor die package and integrated circuit package and fabricating method thereof
US8043892B2 · kind B2 · utility
2Cited by
0References
8Claims
0Family size
Assignee
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Key dates
| Filing date | Apr 8, 2008 |
| Grant date | Oct 25, 2011 |
| Priority date | — |
| Expiry date | Sep 26, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3025
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor die package includes a substrate, a semiconductor die mounted on the substrates a molding covering the semiconductor die and which is formed on the substrate and a conductive layer laminated on the molding.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.