Method of forming capacitor of semiconductor memory device
US8043925B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 6, 2009 |
| Grant date | Oct 25, 2011 |
| Priority date | — |
| Expiry date | Dec 3, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76816
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a semiconductor memory device includes sequentially forming an etch stop layer and then a mold layer, forming a plurality of line-shaped support structures and a first sacrificial layer filling gaps between the support structures on the mold layer, sequentially forming a plurality of line-shaped first mask patterns, a second sacrificial layer, and then second mask patterns on the support structures and on the first sacrificial layer, removing the second sacrificial layer, the first sacrificial layer, and the mold layer using the first mask patterns, the second mask patterns, and the support structures as masks, removing the first mask patterns and second mask patterns, filling the storage node electrode holes with a conductive material and etching back the conductive material to expose the support structures, and removing the first sacrificial layer and the mold layer to form pillar-type storage node electrodes supported by the support structures.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.